SAW components typically contain one or more piezoelectric substrates and a housing and/or a carrier for receiving the piezoelectric substrate(s).
The piezoelectric substrate has interdigital transducers and reflectors as component structures, which are photolithographically structured in a thin metallic layer. The interdigital transducers comprise electrode and busbar regions, the reflectors comprise parallel reflector fingers and, if necessary, busbar regions which electrically connect them.
Some busbar regions are expanded into electrical contact points referred to as bond pads, at which the different potentials of the interdigital transducers and reflectors are transmitted via soldered connections to a suitable carrier, which may also be a housing or a part thereof.
One group of SAW components are the SAW filters referred to as DMS filters (double mode resonator filters) or also CRF filters (coupled resonator filters). They use multiple resonating regions which are acoustically and electrically coupled in order to achieve a desired transmission function.
A typical DMS filter has two acoustic tracks, each of which comprises a middle interdigital transducer having two busbars and bond pads, framed by a further interdigital transducer on each side and two reflectors on the two ends of these interdigital transducers. The bond pads of the middle interdigital transducer are, for example, connected on one side to the ground bond pads of the neighboring reflector, on the other side, the busbar is electrically connected to the busbar of the corresponding interdigital transducer from the second track. The connection pad used for the connection is electrically “floating” in relation to the electrical potentials of the middle interdigital transducer.
A further group of SAW components are the ladder-type filters. A ladder-type filter comprises at least one ladder base element, which is composed of a first resonator (series resonator), connected in series from the input to the output, and a second resonator (parallel resonator), which is connected in parallel to ground. A single resonator typically has an interdigital transducer structure including two busbars and bond pads and a reflector structure at each of the two ends. Typically, multiple such base elements are electrically connected in series one after another, multiple resonators of the same type also able to be assembled into one acoustic track. To electrically connect two series resonators, the output busbar of the first series resonator is linked to the input busbar of the second series resonator using a line. A branch from this connection line to the input busbar of the parallel resonator generates the electrical connection of the parallel resonator lying between them.
A third group of SAW components are the DMS filters having additional resonators, i.e., a mixture of DMS and ladder-type filters. Usually, an acoustic DMS track is combined with one or more resonator structures (series and/or parallel resonators). If a DMS track is combined with two series resonators, for example, a first series resonator is electrically connected to the first busbar of the middle transducer. The second busbar is expanded into a bond pad, for example. The external interdigital transducers are connected on one side to the ground bond pads of the neighboring reflector, and on the other side the two busbars are joined together and electrically connected to the second series resonator. Thus, a series circuit made of resonator, DMS track, and further resonator results. Bond pads are externally attached to each of the resonators.
A BAW resonator comprises at least one piezoelectric layer, which is positioned between at least two electrodes and is used for electro-acoustic conversion of an electrical signal applied to the electrodes. Either air on both sides (bridge-type), or a sequence of layers (solidly-mounted resonator) on one side, or a sequence of layers on both sides, each on a shared carrier (e.g., silicon) may be used as the mirror (=reflector) in this case.
Because of the miniaturization of electrical components required for many technical applications, flip chip technology has also been used for connecting the chip to a carrier in SAW and/or BAW components in recent years. The electrical connection of the chip to the housing and/or carrier is performed in this case via solder globules, bumps, which are placed on the bond pads, among other things. Carrier bond pads, which are diametrically opposite to the bond pads on the chip, are located on the carrier.
In this case, the chip is mounted upside down in the housing and/or on the carrier, so that the structured side points downward in the direction of the housing and/or carrier.
In order to produce a soldered connection between the housing and/or carrier and the first metal layer used for the acoustic structures, which comprises non-solderable aluminum and/or aluminum alloy, a second solderable metal layer, referred to in the following as the solder metal plating, is applied. This second, solderable metal layer is also referred to as the under bump metal plating (UBM). The actual circular bond pads to which the bump is finally soldered are defined by the solder metal plating, since the solder only adheres there. The soldering of the bumps is performed in a reflow process, in which the solder is caused to melt.
Sufficient mechanical stability of all bump connections is very important, since the functionality of the component would be destroyed by a single poor electrical bump connection. The volume of the bumps and the dimensions of the solder metal plating are dimensioned in such a way that the entire component withstands the maximum thermal and mechanical loads required by the client. The area of the solder metal plating per bump is thus subject to specific quality requirements and may not be made arbitrarily small. Further requirements result as boundary conditions from the manufacturing process, such as a minimum interval between the chip edge and a component structure or a safety interval between the solder metal plating and the acoustically active component structures.
FIG. 1 shows a known SAW filter. The size of the acoustic tracks is determined in this case by, among other things, the frequency and impedance positions of the SAW component. It is clear from the figure that, in addition to the acoustic tracks, the busbars, bond pads, and free chip regions also contribute to the overall chip size. The chip size also determines the size of the housing.
Because of the further miniaturization of electrical devices, housings which are small as possible are required. The assumption in this case is that specific requirements in regard to the electrical properties of the components are also to be fulfilled. The goal is thus to reduce the chip size through an optimized chip layout and thus further shrink the housing and/or finished parts with unchanged or even improved filter performance.
This object is achieved according to the present invention by a component according to Claim 1. Advantageous embodiments of the present invention result from the subclaims.
Known solder metal platings on the chip and on the carrier and/or housing have been shaped circularly up to this point. A barrel-shaped connection, like a sphere having two cut-off poles, forms through the melting of the solder bumps with the two circular areas of the solder metal platings. This results in the same space being required for the bump connections in the x and y directions on the chip.
The present invention now suggests a bump connection defined via the solder metal plating, in which the dimension along a first axis is significantly smaller than that along a second axis, which particularly runs transversely thereto. Components according to the present invention have a dimension along a second axis which exceeds the dimension along the first axis by more than 30%, for example, by 30 to 80%. The shape and/or the cross-section of the solder metal plating is then, for example, ellipsoidal and/or a type of flattened or oblong circle, which has linear sections parallel to one another.
A more compact arrangement of the structures on the surface of the substrate results from the different dimensions of the solder metal plating on different axes, so that less substrate surface is required and therefore a smaller substrate is possible.
Since the solder bump is only soldered on the solderable solder metal plating provided for this purpose, it is forced into the shape of the solder metal plating during the reflow process. Independently of the area of the contact pad on the substrate, which is typically larger, the size and shape of the solder metal plating is solely responsible for the shape of the bump. The solder metal plating may additionally be applied to the normal metal plating, comprising aluminum, for example, e.g., as a multilayered thin metal plating having a thin gold layer as the actual solderable surface. For example, layer sequences made of Ti, Pt, and Au or Ti, Ni, and Au are well suitable.
The shape of the non-round solder metal plating is selected in such a way that the area content is equal to the previous circular solder metal plating in order to still fulfill the requirements on the mechanical stability. Depending on the length to width ratio of the ellipsoidal shape, in contrast to the circle, a reduction of the dimension results in the direction of the narrow side of the ellipse. In the most favorable case, the entire chip and/or the substrate may be shrunk precisely by the difference between circular diameter and narrow side of the ellipse in the x or y direction. For specific applications, it may also be advantageous to select a shape deviating from an oval or even an irregular shape for the solder metal plating, in order to better correspond to the space offered on the substrate. For chip area reduction, it may be favorable to design all or only a few of the solder metal platings as non-round according to the present invention.
In an advantageous embodiment of the present invention, the non-round and particularly ellipsoidal solder metal platings do not all have their longer axes aligned identically. With different solder metal platings, the larger dimension then results along different substrate axes. The alignment of the long and narrow sides of the solder metal platings is then performed as a function of the shape of the free substrate surface available.
It is also advantageous to position the solder metal platings between substrate edges and the component structures, the longer dimension of the solder metal platings then advantageously being aligned parallel to the particular substrate edge.
It is also possible to position the non-round solder metal plating between different component structures and align the second longer axis parallel to the neighboring edges of the component structures.
The present invention is applied especially advantageously in SAW filters of the greatly varying types cited at the beginning. In this case, the beveling of reflector structures provides further advantages, in order to at least partially place the necessary solder metal platings in the triangular free areas additionally obtained thereby.
Beveling the reflectors in the region which is furthest from the interdigital transducer assigned to the reflector does not result in worsening of the electrical properties of the SAW filter. A more compact chip layout results, which allows further reduction of the chip area.
The beveling is performed in such a way that a first group of reflector fingers, positioned closer to the assigned interdigital transducer, remains unchanged (equally long), while the reflector fingers of the second group have their length shortened on one or both sides, the length of the reflector fingers falling with increasing distance to the assigned interdigital transducer.
The first group of reflector fingers whose length is unchanged advantageously comprises 20 to 50 reflector fingers.
If the two features “ellipsoidal and/or non-round solder metal plating” and “beveled reflector structures” are combined, a further reduction of the chip area may be achieved in many applications.
The present invention is used especially advantageously in high-frequency components which operate using acoustic waves, in which the acoustic component structures are relatively small because of the relatively low wavelengths. However, with unchanged mechanical requirements on the component, the size of the bump connections is less affected thereby, so that in high-frequency components the proportion of the substrate area claimed by the bump connections is relatively large in relation to components which operate at lower frequency. A relatively greater reduction of the substrate size is thus achieved using the present invention in high-frequency components.
A substrate having a rectangular or generally quadrilateral surface, on which the component structures are oriented parallel to a diagonal of the substrate, may also be advantageous. A solder metal plating may be provided in the corners. This arrangement is especially advantageous if the component structures proximal to the corners cited are beveled reflectors, whose beveled edges are then approximated by the corner angle of the substrate. In the ideal case, the beveled edges are aligned parallel or approximately parallel to at least one substrate edge. The component structures may thus be shifted further into the corner and save further substrate surface.
A piezoelectric substrate, particularly piezoelectric substrates made of LiTaO3 or LiNbO3, is advantageously used. Silicon may also be used as a substrate for BAW components.
Since most crystalline piezoelectric substrates often have different thermal expansion coefficients along different crystal axes, very good thermal tailoring of substrate and carrier is practically not possible if not the same material is used for the carrier as for the substrate, which is typically not possible for reasons of cost, however. According to the present invention, it is now possible to match the carrier to the expansion coefficient along one axis of the substrate. If bump connections according to the present invention are used, minimized thermal tensions are obtained if the solder metal platings are implemented as oblong and ellipsoidal, for example, and are positioned on the substrate one behind another and aligned parallel to this substrate axis, to whose expansion coefficients the carrier material is thermally matched. Furthermore, it is advantageous if some solder metal platings which are oriented in the direction of the non-matched axis are positioned in the middle of the component, i.e., on the neutral line in relation to the thermal expansion. Using both measures, a lower mechanical load of the bump connections is obtained thermally and the bump size may be reduced without the mechanical stability of the bump connections suffering under thermal load. A smaller bump is implemented by a smaller solder metal plating and results in a gain in additional substrate area and/or allows shrinking of the substrate. However, vice versa, it is also possible to select a carrier material which, under the listed aspects in regard to minimal thermomechanical load of the bump connections, is matched to a given layout and/or to the positioning of the solder metal platings on the substrate surface.
In the following, the present invention will be explained in greater detail on the basis of preferred embodiments with reference to FIGS. 1 through 24. The figures are only schematic and are not bound to scale. In particular, the number of interdigital transducers and reflector fingers has been reduced for better visibility.